Start: Monday, 03 December 2018 @ 10:00

End: Tuesday, 04 December 2018 @ 16:00

Description:

A number of manufacturers have recently started to produce high performance, multicore CPUs based on the ARM64 architecture. This hands-on workshop is aimed at helping users to port HPC codes to ARM64 processors.

Although ARM64 is already supported by a number of compiler suites including GNU, ARM and Cray, many users may only have experience in compiling for the Intel x86
architecture so some changes to the build procedure may be required. In particular, the compilation options required for best performance may be different.

This 2-day hands-on workshop, delivered by staff from ARM and EPCC, will cover the ARM64 architecture, compilers and libraries. Access will be provided to the Tier2 GW4 Isambard system, based on Cavium ThunderX2 CPUs, for all practical exercises.

Although test codes will be provided for the hands-on exercises, all attendees are encouraged to bring their own applications to work on during the practical sessions.

 

Outline timetable

Monday 3rd December

10:00 - 13:00: ARM64 Hardware
13:00 - 14:00: Lunch (not provided)
14:00 - 17:00: ARM64 compilers and libraries
17:00 CLOSE
Tuesday 4th December

10:00 - 13:00: Hands-on porting session
13:00 - 14:00: Lunch (not provided)
14:00 - 16:00: Hands-on porting session (continued)
16:00: CLOSE
 

 

https://events.prace-ri.eu/event/804/

Event type:
  • Workshops and courses
Programming the ARM64 Processor @ EPCC https://tess.elixir-europe.org/events/programming-the-arm64-processor-epcc A number of manufacturers have recently started to produce high performance, multicore CPUs based on the ARM64 architecture. This hands-on workshop is aimed at helping users to port HPC codes to ARM64 processors. Although ARM64 is already supported by a number of compiler suites including GNU, ARM and Cray, many users may only have experience in compiling for the Intel x86 architecture so some changes to the build procedure may be required. In particular, the compilation options required for best performance may be different. This 2-day hands-on workshop, delivered by staff from ARM and EPCC, will cover the ARM64 architecture, compilers and libraries. Access will be provided to the Tier2 GW4 Isambard system, based on Cavium ThunderX2 CPUs, for all practical exercises. Although test codes will be provided for the hands-on exercises, all attendees are encouraged to bring their own applications to work on during the practical sessions.   Outline timetable Monday 3rd December 10:00 - 13:00: ARM64 Hardware 13:00 - 14:00: Lunch (not provided) 14:00 - 17:00: ARM64 compilers and libraries 17:00 CLOSE Tuesday 4th December 10:00 - 13:00: Hands-on porting session 13:00 - 14:00: Lunch (not provided) 14:00 - 16:00: Hands-on porting session (continued) 16:00: CLOSE     https://events.prace-ri.eu/event/804/ 2018-12-03 10:00:00 UTC 2018-12-04 16:00:00 UTC [] [] [] workshops_and_courses [] []