All the PATC courses at BSC are free of charge.

Objectives: 

The tutorial will motivate the audience on the need for portable, efficient programming models that put less pressure on program developers while still getting good performance for clusters and clusters with GPUs, and heterogeneous environments with FPGAs.

More specifically, the tutorial will:

Introduce the hybrid MPI/OmpSs parallel programming model for future exascale systems
Demonstrate how to use MPI/OmpSs to incrementally parallelize/optimize:

MPI applications on clusters of SMPs, and
Leverage CUDA and OpenCL kernels with OmpSs on clusters of GPUs

Introduce the OmpSs@FPGA programming model, how to write, compile and execute applications on FPGAs

Show the "implements" feature to explot parallelism across cores and IP cores
Analyze the performance of OmpSs@FPGA applications and tune them for the target architecture

Level:

INTERMEDIATE: for trainees with some theoretical and practical knowledge; those who finished the beginners course
ADVANCED: for trainees able to work independently and requiring guidance for solving complex problems

Requirements: 

Good knowledge on the Linux command line environment (commands, text editors, GNU compilers...)
Good knowledge of C/C++
Basic knowledge of CUDA/OpenCL and/or Vivado HLS
Basic knowledge of Paraver/Extrae

Learning Outcomes:

The students who finish this course will be able to develop benchmarks and simple applications with the MPI/OmpSs programming model to be executed in clusters and clusters of GPUs, and with the OmpSs@FPGA, to be executed on FPGA boards, like the Zedboard, or Xilinx ZCU102 and Alveo.

Further information:

In the context of virtual meetings, the Organiser may facilitate live webstreaming and audio recording. You have the option to opt out of inclusion in recordings by contacting our Education&Training team.

CONTACT US for further details about MSc, PhD, Post Doc studies, exchanges and collaboration in education and training with BSC.
For further details about Postgraduate Studies in UPC - Barcelona School of Informatics (FiB), visit the website

Sponsors: BSC and PRACE 6IP project are funding the PATC @ BSC training events.
If you want to learn more about PRACE Project, visit the website.

Agenda:

Day 1 (Monday)

Session 1 / 3:00pm – 6:30 pm (2 h lectures, 1 h practical, with a pair of short breaks)

3.00pm – Introduction to OmpSs
4.30pm - Introduction to performance analysis tools (Paraver, Extrae)
5.00pm – OmpSs single node programming hands-on
6.30pm – Adjourn

Day 2 (Tuesday)

Session 2 / 3:00pm – 6:30 pm (1 h lectures, 2 h practical, with a pair of short breaks)

3.00h – Introduction to MPI/OmpSs
4.00h – MPI/OmpSs hands-on
6.00h – Adjourn

Day 3 (Wednesday)

Session 3 / 3:00 am – 6:30 pm (1 h lectures, 3 h practical, with a pair of short breaks)

3.00pm – More on OmpSs: GPU/CUDA programming
4.00pm– OmpSs single node programming hands-on with GPUs
6.30pm – Adjourn

Day 4 (Thursday)

Session 4 / 3:00pm – 6:30 pm (3 h tutorial/demo, with a pair of short breaks)

3:00pm – OmpSs@FPGA tutorials
4:30pm – OmpSs@FPGA demo / discussion
6:30pm – Adjourn

Day 5 (Friday)

Session 4 / 3:00 am – 6:30 pm (3 h tutorial/demo, with a pair of short breaks)

3:00pm – Parallelization process with Parallware Analyzer (Appentra)
4:00pm – Parallelware Analyzer hands-on session
6:30pm – Adjourn

END of COURSE
https://events.prace-ri.eu/event/1141/